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Electronics Departments Department of Computer Science and Communications Technologies Research and innovation
  • Department of Computer Science and Communications Technologies
    • About department
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  • Department of Electrical Engineering
  • Department of Electronic Systems
  • Laboratory of Electronics
  • Institute of High Magnetic Fields
  • Research Institute for Telecommunications

Research and innovation

  • Projects
  • Micro- and Nanoelectronics Design and Research
  • Implemented ASICs projects
  • Available Equipment
Projects
 

  • Project with legal entities "Design and research on high frequency integrated circuits for smart wireless communication systems". Customer: "UAB Lime Microsystems". Contract number: 10124. Supervisor R. Navickas;

  • Project with legal entities “Design of Smart RFID card”. Customer: JSC “Vildoranas”. Inočekiai. Contract No. 11796. Supervisor V. Barzdėnas;

  • Project of Lithuanian Science Council “Low phase-noise, low power LC-VCO in 0,18 µm CMOS technology”. Students' practice of 2014. Contract No. 11340/SMP14-036, student: M. Jankūnas, supervisor V. Barzdėnas;

  • Creation of Specialized frequency converter for serial production. High Technology Development Program Project. 31V-37. 2012-2013. Supervisor A. Baškys.

  • Substantial renewal of first cycle programmes of VGTU Electronics Faculty. Project “Study quality improvement, increasing internationalization“ of Human Resources Action Programme Priority 2 „Lifelong learning“ VP1-2.2-ŠMM-07-K. contract No. Nr. VP1-2.2-ŠMM-07-K-01-047. 2010–2012. Supervisor: V. Urbanavičius.

  • Project with legal entities “Integrated transceivers for wireless radio communications”. 2013. Customer: JSC “Lime Microsystems”. Contract No. 4572-M. Supervisor R. Navickas, implementers V. Barzdėnas and others;

  •  Lithuanian Science Council project “Design and Research of Ultrasonic Echo Signal Time-Gain Compensation Amplifier. Students' practice of 2013. Contract No. 10084/SMP13-076, student: A. Vasjanov, supervisor: V. Barzdėnas;

  • Project with legal entities "Capacitive micromachined transducer arrays (CMUT) primary electronics circuit design and manufacturing. Customer: “Applied Research Institute for Prospective Technologies” and JSC “Minatech” 2012. Contract No. APS/12-5. Experts-implementers R. Navickas, V. Barzdėnas and others;

  • Lithuanian Science Council Project “Design and Research of Low-power, Broadband sample and hold amplifier”. Students' Practice 2012. Contract no. 8561/SMP12-058, student V. Mačaitis, supervisor V. Barzdėnas;

  • Lithuanian Science Council Project “Studies of Solar cell energy conversion efficiency and mathematical model building”. Student Research 2011/2012, Contract No. 7880/SMT12P-157, student F. Ą. Bagdonas, supervisor V. Barzdėnas;

  • Lithuanian Science Council Project "Design of Nanometric Phase Locked Loop (PLL) Integrated Circuit" Student Research 2011/2012, Contract No. 7866/SMT12P-012, student M. Jurgo, supervisor R.Navickas;

  • Development of controller of asymmetric dynamic objects resistant to electromagnetic disturbances. 3456-M. Contracting authority UAB „Ventimatika“, 2010–2011. Supervisor: A. Baškys.

  • Development and testing of embedded system used in the frequency converter intended for advanced water supply systems. 3817-MA. Contracting authority UAB „Tamona“, 2010–2011. Supervisor: A. Baškys.

  • Frequency Converters, development and introduction into series production. High-tech development program B-13/2007-2009. Supervisor: A. Baškys.

  • Research work “Planar heterojunction diodes and THz emitters electrics parameter calculations” by Lithuanian State Science and Studies Foundation project “Nanostructures in Microwave and Terahertz Electronics” (No. P-07001), 2007, implementer V. Barzdėnas and others; 

  • Nanoelectronics development forecast in Lithuania and the highest quality specialist training and qualification. - Study of Nanotechnology and electronics highest qualification specialist training and qualification in Lithuania. Vilnius, PFI-VGTU, 2007.,(by 2.5 SPD). Implementers: R. Navickas, J. Skudutis and others.
 
Micro- and Nanoelectronics Design and Research
 
Expertise and areas of activity: 
  • IC design consulting, project management and feasibility studies;
  • Cooperation with MOSIS and Europractice programs;
  • Full mixed signal RF, analogue and digital design capability;
  • Circuit design according to specifications;
  • Full Spice simulations & performance verification;
  • Custom Integrated circuit layout;
  • CMOS & BICMOS integrated circuit design & layout.
  • CMOS process geometry experience from 0.7 μm to 45 nm and below;
  • Extensive CAD expertise that includes industry standard Cadence, Silvaco TCAD tool chains;
  • Analysis, evaluation and preparation of recommendations for system vulnerability resistance improvements.
  • Desktop (Windows, Unix), mobile devices (Windows Mobile) or embedded systems development.
  • Desktop or Windows Mobile application development in Microsoft .NET framework. Possible deployment in Unix environments through mono.
  • Embedded systems development in C/C++ or ASM.
  • System integration with embedded (SQLite) or enterprise level RDBMS (PostgreSQL, MySQL, SQL Server).
Implemented ASIC's projects: More informations
 
Contacts:
crypt:PGEgaHJlZj0ibWFpbHRvOnZhaWRvdGFzLmJhcnpkZW5hc0B2Z3R1Lmx0Ij48c3Bhbj5Bc3NvYy4gcHJvZi4gZHIuIFZhaWRvdGFzIEJhcnpkxJduYXM8L3NwYW4+PC9hPg==:xx
Department of Computer Engineering,
Faculty of Electronics,
Vilnius Gediminas Technical University
Naugarduko str. 41-439, LT- 03227
Vilnius, Lithuania.
 
Implemented ASICs projects

Front End ASIC for 2D array of capacitive micromachined ultrasound transducers (CMUT)

Front End ASIC for 2D array of capacitive micromachined ultrasound transducers (CMUT) 
Fig. 1 Plot of the ASIC
Fig. 2 Photo of the fabricated chip 
Description of the ASIC
Ultrasound Transceiver for 2D CMUT Front End (FE) Core integrated circuit (IC) is a device primarily intended to individually excite CMUT elements and to receive, buffer and amplify receiving signals from individual CMUT elements. CMUT FE Core has 256 CMUT elements connection points (CCP) subdivided into 4 apertures laid out as aperture matrix of 2 rows and 2 columns. Each aperture has 64 CCPs laid out as matrix of 8 rows and 8 columns. Each CCP is able to drive single CMUT element or to receive and amplify thesignal coming from a single CMUT element. CMUT FE Core has 64 75 Ω terminated inputs able to receive the transmitting pulse signals. CMUT FE Core 64 inputs are shared with 64 outputs. CMUT FE Core has 64 outputs able to drive 1.5 m long coaxial cable.
The 256 CCPs are multiplexed to 64 outputs by the internal multiplexing structure. The latter structure multiplexes each i-th CCP of j-th aperture to i-th output. 4 digital channels clocked by one clock provide the pixel selection data. The mode signal puts the CMUT FE to transmit or receive mode.
The CMUT FE core is capable to drive 16x16 matrix of CMUT elements simultaneously. The grid of the CCPs is distributed with 250 mm pitch. Each individual transceiver channel contains logic circuit, pulser to generate the excitation pulses of +50 V, preamplifier and protection circuit to protect the preamplifier during the transmit cycle. Average power dissipation is 60 mW per channel. Receive preamplifier has the input-referred noise density of 4 nV/sqrt(Hz).  Amplifier recovery time after TX pulse 0.3 μs.
IC Prototyping Service: Europractice;
Chip size: 5.25×5.25mm;
Technology: AMS 0.18μm HV 6M CMOS ;
Year: 2013;
Designers:
Prof. habil. dr. Romualdas Navickas;
Assoc. prof. dr. Vaidotas Barzdenas;
Phd student Karolis Kiela;
Master student Marijan Jurgo.
More information: Europractice IC service

4 GHz LC-VCO with Frequency Divider

4 GHz LC-VCO with Frequency Divider
Fig. 1 Plot of the ASIC
Fig. 2 Photo of the fabricated chip
Description of the ASIC
A fully integrated 3.0 – 3.6 GHz LC-VCO with an ETSPC frequency divider is designed and fabricated in a 0.18 μm IBM 7RF CMOS technology. The total chip area, including the ESD protection circuits and pads, is 1.5×1.5 mm2. The active part of this fabricated chip occupies only 0.65×0.65 mm2. Using 4-bit switched capacitor block and linearly varying varactors, the LC‑VCO achieves a tuning range from 3.02 GHz to 3.55 GHz. The output signal of the LC-VCO is divided down through ETSPC divider, with divide values ranging from 2 to 256. The measurement results of the proposed LC-VCO with frequency divider show a phase noise better than -108.89 dBc/Hz @ 1 MHz offset from 3.6 GHz carrier and a total power consumption of about 212 mW for 2.49 dBm of output power.
IC Prototyping Service: MOSIS;
Chip size: 1.5×1.5mm;
Technology: IBM RF 0.18μm 6M CMOS;
Year: 2014;
Designers:
Assoc. prof. dr. Vaidotas Barzdenas
Master student Marijan Jurgo
Master student Vytautas Mačaitis

MFB Active Filter

MFB active filter
Fig. 1 Plot of the ASIC
 
Fig. 2 Photo of the fabricated chip
 IC Description of the ASIC 
A 2nd order multiple feedback topology filter with adjustable bandwidth from 10 MHz up to 80 MHz with an integrated band-gap current source. The filter uses analog switches with external voltage driver to implement fine tuning of the cutoff frequency. Filter bandwidth and bias settings are controlled via separate digital control words, while the stability control adjustments are automatic. A separate pin is present for band-gap testing purposes.
A test board was designed and manufactured to test the fabricated design parameters. The test board includes switches for current and bandwidth control, pin for fine tuning the filter AC response via controllable voltage source. The board also includes a test pin for band gap current reference test (via resistor). All of the measurements were done by using a signal generator (Agilent E4432B), signal analyzer (Agilent E4402B), power supply (Keysight E3631A) and millimeter (Keysight U3402A). Since the design uses a fully differential topology, signal conversion from single ended to differential was accomplished by using two buffers (input LMH6552MA, output AD8045ARDZ).
 
A total of 3 test boards were made. The chip meets the expected specification with a deviation that is not more than 10% (comparing to simulation results). All of the controls behave as expected. The offset error of the opamp is 1.5mV, the total current draw ranges from 10mA to 20mA from a 1.8V source (current draw depends on current control). The filter bandwidth of the chip meets can reach the expected 10-80MHz with the use of controls options. The band gap produces 20uA of current with an accuracy of 0.3uA (max measured difference not factoring the on-board resistance deviation).
 
IC Prototyping Service: MOSIS;
Chip size: 1.5×1.5mm;
Technology: IBM RF 0.18μm 6M CMOS ;
Year: 2015;
Designers:
PhD Karolis Kiela
PhD Marijan Jurgo
PhD Vytautas Mačaitis
Available Equipment
  • Digital 2-channel and 4-channel "Tektronix" oscilloscopes;
  • Function signal generators;
  • Various measuring instruments and multimeters;
  • Various voltage supplies;
  • Various development boards with ARM, AVR, PIC microcontroller families and FPGA chips for embedded systems design and research;
  • Various stands for electric motor control research;
  • Stand for photovoltaic voltage sources research;
  • Printed circuit board milling and drilling devices;
  • Printed circuit board hole metallization device;
  • HIL (Hardware in the Loop) "National Instruments", NI USB-6216 device;
  • Various electronic components and materials;
  • Various software for electronic circuits and microcontrollers programs operation simulation, printed circuit boards and electronic devices design.
    • Page administrators:
    • Vaidotas Barzdėnas
    • Rūta Bernotaitė
    • Aurimas Gedminas
    • Šarūnas Paulikas
    • Andžej Kuldoš
    • Augustė Jablonskytė
    • Agnė Augustinaitė
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